1. Field of the Invention
The present invention relates to designing lead frames for ICs (integrated circuits), and more particularly to partial or half etching techniques that provide a stable patterned lead frame that improves reliability for the resultant encapsulated packaged IC.
2. Background Information
Traditional lead frames for ICs accept wire bonds between the chip and the lead frame or accept the chip directly (flip chip or COL, chip on a lead). The chip is attached to the lead frame and encapsulated forming an assembly that is then separated from other assemblies. The lead frame completes the electrical connections from the chip to the outside world beyond the encapsulation.
One continuing problem is the lead frame included etched leads that must be electrically isolated from all the other leads coming from an IC. This need results in very thin, flimsy leads that lack structural rigidity and are difficult to hold in place for either wire bonding or flip chip bonding. In addition the lead frames for many ICs are usually handled in groups for efficiency, but the lead frame connections between the individual lead frames must be cut or singulated. This singulation is accomplished by cutting with a saw, and sawing leads to quality problems, e.g., delamination, etc. Reliability is reduced and costs in time and money are increased.
One approach to the above problems is found in U.S. Pat. No. 7,129,116 ('116) to Islam et al. This '116 patent is incorporated herein by reference. The '116 patent pre-etches a pattern on the lead frame but does not etch through the lead frame. The result is an interconnected web of leads that are more rigid structure supporting the IC while making either wire or flip chip bonds. The many interconnections on the web lend structural support, but many must be later removed to break the many short circuits between the electrical leads. Later, after encapsulation, the other side of the lead frame is etched to isolate the leads from each other, and the same etching can accommodate singulation by removing metal connecting the lead frames from each other.
One limitation of the '116 patent is that the metal interconnected web restricts where the etched leads may run with respect to the chip and where the other leads may run. For example, since the web is of the metal it may be inconvenient, difficult or impossible to design long runs beneath the IC or runs that cross each other. The support short circuits may get in the way.
Herein as would be understood by those skilled in the art, the terms, “lead” and “run” are terms of art that may be used herein interchangeably to refer to the etched conductive “paths” that electrically connect one point to another on the lead frame.
The present invention is directed to the above mentioned and other limitations of the prior art.